MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 460

MCF5272VF66

Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5272VF66

Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

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Bus Operation
20.6.2
CSBRn[EBI] is 11 for FLASH/SRAM devices and for peripherals having 8-bit data bus widths and no byte
strobe inputs. These type of memory devices have separate pins for write enable, chip select, and output
enable. All chip selects support this EBI mode.
The key difference between EBI = 11 and EBI = 00 is that BS[3:0] can be directly connected to the R/W
inputs of the 8-bit wide SRAM devices and the R/W output from the MCF5272 can be left unconnected.
The number of wait states required for the external memory or peripheral can be programmed in
CSORn[WS]. The external transfer acknowledge signal, TA, is provided to allow off-chip control of wait
states. External control of wait states is enabled when CSORn[WS] is 0x1F.
20-12
SDCLK
A[22:0]
D[31:0]
OE
R/W
CSn
BS[3:0]
TA
Interface for FLASH/SRAM Devices without Byte Strobes
(H)
Figure 20-10. Longword Read; EBI=11; 32-Bit Port; Internal Termination
(H)
(H)
MCF5272 ColdFire
®
Integrated Microprocessor User’s Manual, Rev. 3
C1
C2
Freescale Semiconductor

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