MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 48
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MCF5272VF66
Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet
1.MCF5272VF66.pdf
(544 pages)
Specifications of MCF5272VF66
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant
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xlviii
then <operations>
else <operations>
sign-extended
If <condition>
<ea>y,<ea>x
Instruction
# <vector>
<label>
<shift>
<size>
<xxx>
<list>
←→
<>
SF
<<
>>
bc
dc
dn
→
ic
&
+
–
~
x
^
/
|
Source and destination effective addresses, respectively
Assembly language program label
List of registers for MOVEM instruction (example: D3–D0)
Shift operation: shift left (<<), shift right (>>)
Operand data size: byte (B), word (W), longword (L)
Both instruction and data caches
Data cache
Instruction cache
Identifies the 4-bit vector number for trap instructions
identifies an indirect data address referencing memory
identifies an absolute address referencing memory
Signal displacement value, n bits wide (example: d16 is a 16-bit displacement)
Scale factor (x1, x2, x4 for indexed addressing mode, <<1n>> for MAC operations)
Arithmetic addition or postincrement indicator
Arithmetic subtraction or predecrement indicator
Arithmetic multiplication
Arithmetic division
Invert; operand is logically complemented
Logical AND
Logical OR
Logical exclusive OR
Shift left (example: D0 << 3 is shift D0 left 3 bits)
Shift right (example: D0 >> 3 is shift D0 right 3 bits)
Source operand is moved to destination operand
Two operands are exchanged
All bits of the upper portion are made equal to the high-order bit of the lower portion
Test the condition. If true, the operations after ‘then’ are performed. If the condition is false and the optional
‘else’ clause is present, the operations after ‘else’ are performed. If the condition is false and else is
omitted, the instruction performs no operation. Refer to the Bcc instruction description as an example.
MCF5272 ColdFire
Table ii. Notational Conventions (continued)
®
Integrated Microprocessor User’s Manual, Rev. 3
Operations
Operand Syntax
Freescale Semiconductor
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