MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 430
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MCF5272VF66
Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet
1.MCF5272VF66.pdf
(544 pages)
Specifications of MCF5272VF66
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant
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Signal Descriptions
19.6
This section describes bus control signals.
19.6.1
The output enable/read signal (OE/RD) defines the data transfer direction for the data bus D[31:0] for
accesses to SRAM, ROM or external peripherals. A low (logic zero) level indicates a read cycle while a
high (logic one) indicates a write cycle.
This signal is normally connected to the OE pins of external SRAM, ROM, or FLASH.
19.6.2
The byte strobes (BS[3:0]) define the flow of data on the data bus. During SRAM and peripheral accesses,
these outputs indicate that data is to be latched or driven onto a byte of the data when driven low. BSn
signals are asserted only to the memory bytes used during a read or write access.
BSn signals are asserted during accesses to on-chip peripherals but not to on-chip SRAM, cache, or ROM.
During SDRAM accesses, these signals indicate a byte transfer between SDRAM and the MCF5272 when
driven high.
For SRAM or FLASH devices, BS[3:0] outputs should be connected to individual byte strobe signals.
For SDRAM devices, BS[3:0] should be connected to individual SDRAM DQM signals. Note that most
SDRAMs associate DQM3 with the MSB, in which case BS3 should be connected to the SDRAM's
DQM3 input.
19-20
Bus Control Signals
Output Enable/Read (OE/RD)
Byte Strobes (BS[3:0])
BS3 BS2 BS1 BS0
MCF5272 ColdFire
1
1
1
1
0
1
0
0
1
1
1
0
1
0
0
Table 19-3. Byte Strobe Operation for 32-Bit Data Bus
1
1
1
0
1
1
0
0
1
1
0
1
1
0
0
1
1
0
1
1
0
1
0
1
0
1
1
0
1
0
®
1
0
1
1
1
0
1
0
0
1
1
1
0
1
0
Integrated Microprocessor User’s Manual, Rev. 3
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
FLASH/SRAM
Access Type
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
None
Access Size Data Located On
Longword
Longword
None
Word
Word
Byte
Byte
D[31:24]
D[23:16]
D[31:16]
D[23:16]
D[31:24]
D[31:16]
D[15:8]
D[15:0]
D[31:0]
D[15:8]
D[15:0]
D[31:0]
D[7:0]
D[7:0]
—
Freescale Semiconductor
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