MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 282

MCF5272VF66

Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5272VF66

Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

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Universal Serial Bus (USB)
12-24
Bits
4
3
2
1
0
UNHALT
IN_EOP
IN_EOT
IN_LVL
Name
HALT
Table 12-14. EP0IMR and EP0ISR Field Descriptions (continued)
MCF5272 ColdFire
End of transfer. This bit is set when the end of a transfer has been reached for an IN endpoint.
An EOT interrupt is generated when a packet with a size less than the maximum packet size or
the first zero-length packet following maximum size packets is sent.
0 No interrupt pending
1 Transfer completed
End of packet. This bit is set when a packet has been sent successfully for endpoint 0 IN.
0 No interrupt pending
1 IN packet sent successfully
Unhalt. This bit is set when the endpoint 0 HALT_ST bit is cleared by a SETUP packet or USB
reset.
0 No interrupt pending
1 Endpoint halt cleared
Halt. This bit is set when the endpoint 0 HALT_ST bit is set due to a STALL response to the host.
0 No interrupt pending
1 Endpoint halted
IN FIFO threshold level. This bit indicates that the FIFO level has fallen below the level set in the
EPCTL0 register.
0 No interrupt pending
1 IN FIFO threshold level reached
®
Integrated Microprocessor User’s Manual, Rev. 3
Description
Freescale Semiconductor

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