MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 136

• Manufacturer Part Number: MCF5272VF66
• Manufacturer: Freescale

Specifications of MCF5272VF66

• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Not Compliant

Debug Support
5.5.2.1
The basic receive packet,
Table 5-15
5.5.2.2
The basic transmit packet,
Table 5-16
5-18
15–0
15–0
Bits
Bits
16
16
16
S
16
C
Name
Name
Data
Data
C
S
15
describes receive BDM packet fields.
describes transmit BDM packet fields.
15
Receive Packet Format
Transmit Packet Format
Control. This bit is reserved. Command and data transfers initiated by the development system should clear C.
Contains the data to be sent from the development system to the debug module.
Status. Indicates the status of CPU-generated messages listed below. The not-ready response can be ignored
unless a memory-referencing cycle is in progress. Otherwise, the debug module can accept a new serial
transfer after 32 processor clock periods.
S DataMessage
0 xxxxValid data transfer
0 0xFFFFStatus OK
1 0x0000Not ready with response; come again
1 0x0001Error—Terminated bus cycle; data invalid
1 0xFFFFIllegal command
Data. Contains the message to be sent from the debug module to the development system. The response
message is always a single word, with the data field encoded as shown above.
MCF5272 ColdFire
Figure
Figure
Table 5-16. Transmit BDM Packet Field Description
Table 5-15. Receive BDM Packet Field Description
5-13, consists of 16 data bits and 1 status bit.
5-14, consists of 16 data bits and 1 control bit.
Figure 5-14. Transmit BDM Packet
Figure 5-13. Receive BDM Packet
®
Integrated Microprocessor User’s Manual, Rev. 3
Data Field [15:0]
D[15:0]
Description
Description
Freescale Semiconductor
0
0