MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 83

• Manufacturer Part Number: MCF5272VF66
• Manufacturer: Freescale

Specifications of MCF5272VF66

• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Not Compliant

2.6.1
Table 2-7
Freescale Semiconductor
ADD
ADDA
ADDI
ADDQ
ADDX
AND
ANDI
ASL
ASR
Bcc
Instruction
Instruction
Address
MSW
LSW
MSB
LSB
msb
Bit
lsb
d
{}
()
C
N
V
X
Z
n
lists implemented user-mode instructions by opcode.
Instruction Set Summary
Dy,<ea>x
<ea>y,Dx
<ea>y,Ax
#<data>,Dx
#<data>,<ea>x
Dy,Dx
Dy,<ea>x
<ea>y,Dx
#<data>,Dx
Dy,Dx
#<data>,Dx
Dy,Dx
#<data>,Dx
<label>
Operand Syntax
Optional operation
Identifies an indirect address
Displacement value, n-bits wide (example: d
Calculated effective address (pointer)
Bit selection (example: Bit 3 of D0)
Least significant bit (example: lsb of D0)
Least significant byte
Least significant word
Most significant bit
Most significant byte
Most significant word
Carry
Negative
Overflow
Extend
Zero
MCF5272 ColdFire
Table 2-7. User-Mode Instruction Set Summary
Table 2-6. Notational Conventions (continued)
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.L
.B,.W
Operand Size
Condition Code Register Bit Names
®
Integrated Microprocessor User’s Manual, Rev. 3
Subfields and Qualifiers
Source + destination → destination
Source + destination → destination
Immediate data + destination → destination
Immediate data + destination → destination
Source + destination + X → destination
Source & destination → destination
Immediate data & destination → destination
X/C ← (Dx << Dy) ← 0
X/C ← (Dx << #<data>) ← 0
MSB → (Dx >> Dy) → X/C
MSB → (Dx >> #<data>) → X/C
If condition true, then PC + 2 + d
Operand Syntax
16
is a 16-bit displacement)
Operation
n
→ PC
ColdFire Core
2-15