AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 123

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AMD-K6-IIIE+550ACR

Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-K6-IIIE+550ACR

Lead Free Status / RoHS Status
Not Compliant
23543A/0—September 2000
5.10
Pin Attribute
Summary
Sampled
Chapter 5
BF[2:0] (Bus Frequency)
Inputs, Internal Pullups
BF[2:0] determine the internal operating frequency of the
processor. The frequency of the CLK input signal is multiplied
internally by a ratio determined by the state of these signals as
defined in Table 17. BF[2:0] have weak internal pullups and
default to the 3.5 multiplier if left unconnected.
Table 17. Processor-to-Bus Clock Ratios
BF[2:0] are sampled during the falling transition of RESET.
They must meet a minimum setup time of 1.0 ms and a
minimum hold time of two clocks relative to the negation of
RESET.
State of BF[2:0] Inputs
100b
000b
001b
101b
110b
111b
010b
011b
Signal Descriptions
Processor-Clock to Bus-Clock Ratio
AMD-K6™-IIIE+ Embedded Processor Data Sheet
2.0x
3.0x
6.0x
3.5x
4.5x
5.0x
4.0x
5.5x
101

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