AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 46

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
Register X and Y
Pipelines
Figure 6. Register X and Y Pipeline Functional Units
24
Integer X
ALU
MMXÉ
ALU
Th e f u n c t io n a l u n i t s t h a t ex ec u t e MM X a n d 3 D N ow !
instructions share pipeline control with the Integer X and
Integer Y units.
The register X and Y functional units are attached to the issue
bus for the register X execution pipeline or the issue bus for the
register Y execution pipeline or both.
Each register pipeline has dedicated resources that consist of
an integer execution unit and an MMX ALU execution unit,
therefore allowing superscalar operation on integer and MMX
instructions.
In addition, both the X and Y issue buses are connected to the
3DNow! ALU, the MMX/3DNow! multiplier and MMX shifter,
which allows the appropriate RISC86 operation to be issued
through either bus. Figure 6 shows the details of the X and Y
register pipelines.
Register X
Execution
Issue Bus
Pipeline
for the
3DNow!É
Multiplier
MMX/
Preliminary Information
Internal Architecture
(24 RISC86
Scheduler
Shifter
MMX
Buffer
®
Operations)
3DNow!
ALU
Register Y
Execution
Issue Bus
Pipeline
for the
MMX
ALU
23543A/0—September 2000
Integer Y
ALU
Chapter 2