AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 147

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

23543A/0—September 2000
5.38
Pin Attribute
Summary
Driven
Chapter 5
PCHK# (Parity Check)
Output
The processor asserts PCHK# during read cycles if it detects an
even parity error on one or more valid bytes of D[63:0] during a
read cycle. (Even parity means that the total number of 1 bits
within each byte of data and its respective data parity bit is
even.) The processor checks data parity for the data bytes that
are valid, as defined by BE[7:0]#, the byte enables.
PCHK# is always driven but is only asserted for memory and I/O
re a d b u s cy c l es a n d t he se c o n d cy c l e of a n i n t e r ru p t
acknowledge sequence. PCHK# is not driven during any type of
write cycles or special bus cycles. The processor does not take
an internal exception as the result of detecting a data parity
error, and system logic must respond appropriately to the
assertion of this signal.
The processor is designed so that PCHK# does not glitch,
enabling the signal to be used as a clocking source for system
logic.
PCHK# is always driven except in the Three-State Test mode.
For each BRDY# returned to the processor during a read cycle
with a parity error detected on the data bus, PCHK# is asserted
for one clock, one clock edge after BRDY# is sampled asserted.
Signal Descriptions
AMD-K6™-IIIE+ Embedded Processor Data Sheet
125