AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 319

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AMD-K6-IIIE+550ACR

Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-K6-IIIE+550ACR

Lead Free Status / RoHS Status
Not Compliant
23543A/0—September 2000
16
Chapter 16
Signal Switching Characteristics
The AMD-K6-IIIE+ processor signal switching characteristics
are presented in Table 62 through Table 71 on the following
pages. Valid delay, float, setup, and hold timing specifications
are listed. These specifications are provided for the system
designer to determine if the timings necessary for the processor
to interface with the system logic are met.
All signal timings provided are:
Table 62 on page 298 and Table 63 on page 299 contain the
switching characteristics of the CLK input.
Table 64 on page 300 through Table 67 on page 306 contain
the timings for the normal operation signals.
Table 68 on page 308 and Table 69 on page 309 contain the
timings for RESET and the configuration signals.
Table 70 on page 310 and Table 71 on page 310 contain the
timings for the test operation signals.
Measured between CLK, TCK, or RESET at 1.5 V and the
corresponding signal at 1.5 V—this applies to input and
output signals that are switching from Low to High, or from
High to Low
Based on input signals applied at a slew rate of 1 V/ns
between 0 V and 3 V (rising) and 3 V to 0 V (falling)
Valid within the operating ranges given in “Operating
Ranges” on page 288
Based on a load capacitance (C
Signal Switching Characteristics
AMD-K6™-IIIE+ Embedded Processor Data Sheet
L
) of 0 pF
297

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