AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 70

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
SYSCALL/SYSRET
Target Address
Register (STAR)
Figure 35. SYSCALL/SYSRET Target Address Register (STAR)
Write Handling
Control Register
(WHCR)
Figure 36. Write Handling Control Register (WHCR)
48
Note: Hardware RESET initializes this MSR to all zeros.
63
Symbol
63
WAELIM
WAE15M
SYSRET CS Selector and SS
Selector Base
Description
Write Allocate Enable Limit
Write Allocate Enable 15-to-16-Mbyte 16
Reserved
48
The SYSCALL/SYSRET target address register (STAR)
contains the target EIP address used by the SYSCALL
instruction and the 16-bit code and stack segment selector
bases used by the SYSCALL and SYSRET instructions. Figure
35 shows the format of the STAR register, and Table 7 defines
the function of each bit of the STAR register. For more
information, see the SYSCALL and SYSRET Instruction
Specification Application Note, order# 21086. The STAR register
is MSR C000_0081h.
Table 7.
The Write Handling Control Register (WHCR) is a MSR that
contains two fields —the Write Allocate Enable Limit
(WAELIM) field, and the Write Allocate Enable 15-to-16-Mbyte
(WAE15M) bit (see Figure 36). For more information, see
“Write Allocate” on page 215. The WHCR register is MSR
C000_0082h.
47
63–48
47–32
SYSCALL CS Selector and SS
31–0
Bit
Selector Base
SYSCALL/SYSRET Target Address Register (STAR) Definition
Preliminary Information
Description
SYSRET CS and SS Selector Base
SYSCALL CS and SS Selector Base
Target EIP Address
31-22
Bits
Software Environment
32
31
32
31
WAELIM
22
21
Target EIP Address
17
16
W
M
A
E
1
5
15
23543A/0—September 2000
R/W
R/W
R/W
R/W
Chapter 3
0
0