AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 37
AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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23543A/0—September 2000
Branch Logic
3DNow!™ Technology
Chapter 2
The AM D-K 6-I I I E + p ro c es so r i s d e sig n ed w i t h h i g h ly
sophisticated dynamic branch logic consisting of the following:
The AMD-K6-IIIE+ processor implements a two-level branch
prediction scheme based on an 8192-entry branch history table.
The branch history table stores prediction information that is
used for predicting conditional branches. Because the branch
history table does not store predicted target addresses, special
address ALUs calculate target addresses on the fly during
instruction decode.
Th e b ra n ch t a rg e t c a ch e a u g m e n t s p re d i c t e d b ra n ch
performance by avoiding a one clock cache-fetch penalty. This
specialized target cache does this by supplying the first 16 bytes
of target instructions to the decoders when branches are
predicted. The return address stack is a unique device
specifically designed for optimizing CALL and RETURN pairs.
In summary, the AMD-K6-IIIE+ processor uses dynamic branch
logic to minimize delays due to the branch instructions that are
common in x86 software.
AMD has taken a lead role in improving the multimedia and 3D
capabilities of the x86 processor family with the introduction of
3DNow! technology, which uses a packed, single-precision,
floating-point data format and Single Instruction Multiple Data
(SIMD) operations based on the MMX technology model.
An analogous set of 21 registers is available specifically for
MMX and 3DNow! operations.
•
Nine are MMX/3DNow! committed or architectural registers,
consisting of one scratch register and eight registers that
correspond to the MMX registers (mm0–mm7, as shown in
Figure 17 on page 35.
Branch history/prediction table
Branch target cache
Return address stack
Twelve of these are MMX/3DNow! rename registers.
Internal Architecture
AMD-K6™-IIIE+ Embedded Processor Data Sheet
15
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