AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 35

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

23543A/0—September 2000
Figure 1. AMD-K6™-IIIE+ Processor Block Diagram
Decoders
Chapter 2
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Decoding of the x86 instructions begins when the on-chip L1
instruction cache is filled. Predecode logic determines the
length of an x86 instruction on a byte-by-byte basis. This
p re d e c o d e i n fo r m a t i o n i s s t o re d , a l o n g w i t h t h e x 8 6
instructions, in the L1 instruction cache, to be used later by the
decoders. The decoders translate on-the-fly, with no additional
latency, up to two x86 instructions per clock into RISC86
operations.
Note: In this chapter, “clock” refers to a processor clock.
The AMD-K6-IIIE+ processor categorizes x86 instructions into
three types of decodes—short, long, and vector. The decoders
process either two short, one long, or one vector decode at a
time.
The three types of decodes have the following characteristics:
Short decodes—x86 instructions less than or equal to seven
bytes in length
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Internal Architecture
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
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