AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 49
AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
Lead Free Status / RoHS Status
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23543A/0—September 2000
3
3.1
Chapter 3
Software Environment
Registers
This chapter provides a general overview of the AMD-K6-IIIE+
processor’s x86 software environment and briefly describes the
data types, registers, operating modes, interrupts, and
instructions supported by the AMD-K6-IIIE+ processor
architecture and design implementation.
The AMD-K6-IIIE+ processor implements the same ten Model-
Specific Registers (MSRs) as the AMD-K6-2 and AMD-K6-2E
processors Model 8/[F:8], and the bits and fields within these
ten MSRs are defined identically. The AMD-K6-IIIE+ processor
supports an additional MSR for cache control. The low-power
versions of the AMD-K6-IIIE+ processor support a twelfth MSR
to control the AMD PowerNow! technology functions.
See “Model-Specific Registers (MSR)” on page 44 for the MSR
definitions.
The model number for the AMD-K6-IIIE+ processor is Model
D/[3:0], where the actual stepping can be any value in the range
[3:0].
The AMD-K6-IIIE+ processor contains all the registers defined
by the x86 architecture, including general-purpose, segment,
floating-point, MMX/3DNow!, EFLAGS, control, task, debug,
test, and descriptor/memory-management registers.
In addition, this cha pt er provides info rmation on t he
AMD-K6-IIIE+ processor MSRs.
Note: Areas of the register designated as Reserved should not be
modified by software.
Software Environment
AMD-K6™-IIIE+ Embedded Processor Data Sheet
27
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