AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 304
AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
14.4
Enter Stop Grant
Inquire State
Exit Stop Grant
Inquire State
282
Stop Grant Inquire State
processor latches the edge-sensitive signals (INIT, FLUSH#,
NMI, and SMI#), but otherwise does not exit the Stop Grant
state to service the interrupt. When the processor returns to the
Normal state due to sampling STPCLK# negated, any pending
interrupts are recognized after returning to the Normal state.
To ensure their recognition, all of the normal requirements for
these input signals apply within the Stop Grant state.
If RESET is sampled asserted in the Stop Grant state, the
processor immediately returns to the Normal state and the
reset process begins.
The Stop Grant Inquire state is entered from the Stop Grant
state or the Halt state when EADS# is sampled asserted during
a n i n q u i re c y c l e i n i t i a t e d by t h e s y s t e m l o g i c . T h e
AMD-K6-IIIE+ processor responds to an inquire cycle in the
same manner as in the Normal state by driving HIT# and
HITM#. If the inquire cycle hits a modified cache line, the
processor performs a writeback cycle.
Following the completion of any writeback, the processor
returns to the state from which it entered the Stop Grant
Inquire state.
Preliminary Information
Clock Control
23543A/0—September 2000
Chapter 14
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