AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 264

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
Figure 89. SMM Memory
242
Service Routine Entry Point
SMM Base Address (CS)
Fill Down
Figure 89 shows the default map of the SMM memory area. It
c on si st s of a 64 -Kbyt e a re a, b et we en 00 03 _ 00 00 h a n d
0003_FFFFh, of which the top 32 Kbytes (0003_8000h to
0003_FFFFh) must be populated with RAM. The default
code-segment (CS) base address for the area—called the SMM
b a s e a d d re s s — i s a t 0 0 0 3 _ 0 0 0 0 h . Th e t o p 5 1 2 by t e s
(0003_FE00h to 0003_FFFFh) contain a fill-down SMM
state-save area. The default entry point for the SMM service
routine is 0003_8000h.
A20M# is masked
Interrupt vectors use the real-mode interrupt vector table
The IF flag in EFLAGS is cleared (INTR not recognized)
The TF flag in EFLAGS is cleared
The NMI and INIT interrupts are disabled
Debug register DR7 is cleared (debug traps disabled)
System Management Mode (SMM)
Service Routine
Preliminary Information
State-Save
SMM
SMM
Area
0003_FFFFh
0003_FE00h
0003_8000h
0003_0000h
32-Kbyte
Minimum RAM
23543A/0—September 2000
Chapter 12