AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 228

• Manufacturer Part Number: AMD-K6-IIIE+550ACR
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-K6-IIIE+550ACR

• Lead Free Status / RoHS Status: Not Compliant

AMD-K6™-IIIE+ Embedded Processor Data Sheet
Figure 82. L1 and L2 Cache Organization for the AMD-K6™-IIIE+ Processor
206
RAM
Tag
Interface Unit
System Bus
Way 0
MESI
Bits
RAM
Tag
RAM
The processor cache design takes advantage of a sectored
organization (See Figure 83). Each sector consists of 64 bytes
configured as two 32-byte cache lines. The two cache lines of a
sector share a common tag but have separate MESI (modified,
exclusive, shared, invalid) bits that track the state of each cache
line.
RAM
Tag
Tag
Way 0
Way 0
Way 1
Preliminary Information
Pre-Decode Instruction Cache
32-Kbyte L1 Data Cache
32-Kbyte L1 Instruction Cache
Cache Organization
256-Kbyte L2 Cache
128-Entry TLB
64-Entry TLB
MESI
State
Bits
MESI
Bit
Bits
RAM
RAM
Tag
Tag
RAM
Tag
Way 1
Way 1
Way 2
MESI
Bits
State
MESI
Bits
Bit
RAM
Tag
23543A/0—September 2000
Way 3
Processor
Core
MESI
Chapter 9
Bits