EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 302

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484I6

Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S10F484I6

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Contents
Section VI. System Configuration & Upgrades
Chapter 11. Configuring Stratix & Stratix GX Devices
Chapter 12. Remote System Configuration with Stratix & Stratix GX Devices
x
Conclusion .......................................................................................................................................... 10–32
Revision History .................................................................................................................... Section VI–2
Introduction .......................................................................................................................................... 11–1
Device Configuration Overview ....................................................................................................... 11–2
Configuration File Size ....................................................................................................................... 11–6
Altera Configuration Devices ............................................................................................................ 11–7
Configuration Schemes ....................................................................................................................... 11–7
Configuring Using the MicroBlaster Driver .................................................................................. 11–51
Device Configuration Pins ............................................................................................................... 11–51
Introduction .......................................................................................................................................... 12–1
Remote Configuration Operation ...................................................................................................... 12–1
Quartus II Software Support ............................................................................................................ 12–12
Using Enhanced Configuration Devices ........................................................................................ 12–19
Combining MAX Devices & Flash Memory .................................................................................. 12–42
Using an External Processor ............................................................................................................ 12–43
Conclusion .......................................................................................................................................... 12–44
Configuration Speed & Schemes ................................................................................................ 10–30
Remote Update Configuration ................................................................................................... 10–31
JTAG Instruction Support ........................................................................................................... 10–31
MSEL[2..0] Pins ............................................................................................................................... 11–3
V
PORSEL Pins ................................................................................................................................... 11–5
nIO_PULLUP Pins ......................................................................................................................... 11–5
TDO & nCEO Pins .......................................................................................................................... 11–6
PS Configuration ............................................................................................................................ 11–7
FPP Configuration ........................................................................................................................ 11–21
PPA Configuration ....................................................................................................................... 11–30
JTAG Programming & Configuration ....................................................................................... 11–36
JTAG Programming & Configuration of Multiple Devices ................................................... 11–39
Configuration with JRunner Software Driver .......................................................................... 11–41
Jam STAPL Programming & Test Language ............................................................................ 11–42
Remote System Configuration Modes ........................................................................................ 12–3
Remote System Configuration Components .............................................................................. 12–5
altremote_update Megafunction ................................................................................................ 12–14
Remote Update WYSIWYG ATOM ........................................................................................... 12–17
Local Update Programming File Generation ........................................................................... 12–21
Remote Update Programming File Generation ....................................................................... 12–32
CCSEL
Pins ...................................................................................................................................... 11–3
Stratix Device Handbook, Volume 2
Altera Corporation

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