EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 583
EP1S10F484I6
Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S10F484I6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F484I6
Manufacturer:
ALTERA
Quantity:
3 000
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DSP Function
Overview
Finite Impulse
Response (FIR)
Filters
Altera Corporation
September 2004
f
Implementing High Performance DSP Functions in Stratix & Stratix GX Devices
Most DSP applications require local data storage for intermediate
buffering or for filter storage. The TriMatrix memory blocks enable
efficient use of available resources for each application.
The M512 and M4K memory blocks can implement shift registers for
applications, such as multi-channel filtering, auto-correlation, and cross-
correlation functions. Implementing shift registers in embedded memory
blocks reduces logic cell and routing resource consumption.
For more information on TriMatrix memory blocks, see the TriMatrix
Embedded Memory Blocks in Stratix & Stratix GX Devices chapter.
The following sections describe commonly used DSP functions. Each
section illustrates the implementation of a basic DSP building block,
including FIR and IIR filters, in Stratix and Stratix GX devices using DSP
blocks and TriMatrix memory blocks.
This section describes the basic theory and implementation of basic FIR
filters, time-domain multiplexed (TDM) FIR filters, and interpolation and
decimation polyphase FIR filters. An introduction to the complex FIR
filter is also presented in this section.
EP1S30
EP1S40
EP1S60
EP1S80
EP1SGX10C
EP1SGX10D
EP1SGX25C
EP1SGX25D
EP1SGX25F
EP1SGX40D
EP1SGX40G
Table 7–4. TriMatrix Memory Resources in Stratix Devices (Part 2 of 2)
Table 7–5. TriMatrix Memory Resources in Stratix GX Devices
Device
Device
M512
M512
295
384
574
767
224
224
224
384
384
94
94
Stratix Device Handbook, Volume 2
M4K
M4K
171
183
292
364
138
138
138
183
183
60
60
M-RAM
M-RAM
4
4
6
9
1
1
2
2
2
4
4
7–5
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