EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 810
EP1S10F484I6
Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S10F484I6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
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Using Enhanced Configuration Devices
Figure 12–18. Specifying Block Addresses for Application Configuration
12–32
Stratix Device Handbook, Volume 2
Remote Update Programming File Generation
This section describes the programming file generation process for
performing remote system upgrades. The Quartus II CPF utility
generates the initial and partial programming files for configuration
memory within the enhanced configuration devices.
Remote configuration mode uses a factory configuration stored at page 0,
and up to seven application configurations stored at pages 1 through 7.
The factory configuration cannot be updated after initial production
programming. However, the most recent application configuration can
be erased and reprogrammed after initial system deployment.
Alternatively, a new application configuration can be added provided
adequate configuration memory availability.
In remote update mode, you would first create the initial programming
file with the factory configuration image and the application
configuration(s). Subsequently, you can generate partial programming
files to update the most recent application configuration or add a new
application configuration. Quartus II CPF can create partial
programming files in HEX, JAM, JBC, and POF formats.
In addition to the configuration pages, user data or processor code can
also be pre-programmed in the bottom boot and main data areas of the
enhanced configuration device memory. The CPF utility accepts a HEX
input file for the bottom and main data areas, and includes this data in the
Altera Corporation
September 2004
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