EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 811

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
September 2004
POF output file. However, this is only supported for initial programming
file generation. Partial programming file generation for updating user
HEX data is not supported, but can be performed using the enhanced
configuration device external flash interface.
Initial Programming File Generation
The initial programming file includes configuration data for both factory
and application configuration pages. The enhanced configuration device
option’s bits are always located between byte addresses 0x00010000
and 0x0001003F. Also, page 0 always starts at 0x00010040 while its
end address is dependent on the size of the factory configuration data.
Two memory allocation options exist for application configurations: auto
addressing and block addressing. In auto addressing mode, Quartus II
packs all application configurations as close together as possible. This
maximizes the number of application configurations that can be stored in
memory. However, when auto addressing is used you cannot update
existing application configurations. Only new application configurations
can be added to the memory.
The following steps and screen shot (see
programming file generation with auto addressing mode.
1.
2.
3.
4.
5.
6.
Open the Convert Programming Files window from the File menu.
Select Programmer Object File (*.pof) from the drop-down list
titled Programming file type.
Select the enhanced configuration device used (EPC4, EPC8,
EPC16), and the mode used (1-bit Passive Serial or Fast Passive
Parallel). Only during the initial programming file generation can
you specify the Options, Configuration device, or Mode settings.
While generating the partial programming file, all of these settings
are grayed out and inaccessible.
In the Input files to convert box, highlight SOF Data at Page 0 and
click Add File. Select input SOF file(s) for this configuration page
and insert them.
Repeat Step 4 for all application configurations (up to 7 maximum).
Check the Memory Map File box to generate a memory map output
file that specifies the start/end addresses of each configuration page
and user data blocks.
Remote System Configuration with Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
Figure
12–19) describe initial
12–33