EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 672
EP1S10F484I6
Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S10F484I6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F484I6
Manufacturer:
ALTERA
Quantity:
3 000
- Current page: 672 of 864
- Download datasheet (11Mb)
Introduction
9–2
Stratix Device Handbook, Volume 2
The SONET/SDH specification outlines the frame format, multiplexing
method, synchronization method, and optical interface between the
equipment, as well as the specific optical interface.
SONET/SDH continues to play a key role in the next generation of
networks for many carriers. In the core network, the carriers offer services
such as telephone, dedicated leased lines, and Internet protocol (IP) data,
which are continuously transmitted. The individual data channels are not
transmitted on separate lines; instead, they are multiplexed into higher
speeds and transmitted on SONET/SDH networks at the corresponding
transmission speed.
Figure 9–2
as follows:
1.
2.
3.
4.
5.
6.
7.
The SONET/SDH line card first takes a high-speed serial optical
signal and converts it into a high-speed serial electrical signal. The
devices are called physical media dependent (PMD) devices.
The system then recovers the clock from the electrical data using a
clock data recovery (CDR) unit.
The SERDES parallelizes the data so that it can be manipulated
easily at lower clock rates.
The interface between the SERDES and framer is called the SERDES
framer interface. The interface requirements are defined by the OIF.
The framer identifies the beginning of the SONET/SDH frames and
monitors the performance of the system.
The mapper following the framer maps asynchronous transfer
mode (ATM) cells, IP packets, or T/E carrier signals into the SONET
frame.
The PHY-link layer interface provides a bus interface to packet/cell
processors or other link-layer devices.
shows a typical SONET/SDH line card. The system operates
Altera Corporation
July 2005
Related parts for EP1S10F484I6
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: