EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 700
EP1S10F484I6
Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Specifications of EP1S10F484I6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S10F484I6
Manufacturer:
ALTERA
Quantity:
3 000
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DSP Block
DSP Block
10–16
Stratix Device Handbook, Volume 2
Stratix and Stratix GX device DSP blocks outperform LE-based
implementations for common DSP functions. Each DSP block contains
several multipliers that can be configured for widths of 9, 18, or 36 bits.
Depending on the mode of operation, these multipliers can optionally
feed an adder/subtractor/accumulator or summation unit.
You can configure the DSP block’s input registers to efficiently
implement shift registers for serial input sharing, eliminating the need for
external shift registers in LEs. You can add pipeline registers to the DSP
block for accelerated operation. Registers are available at the input and
output of the multiplier, and at the output of the
adder/subtractor/accumulator or summation block.
DSP blocks have four modes of operation:
■
■
■
■
Associated megafunctions are available in the Quartus II software to
implement each mode of the DSP block.
DSP Block Megafunctions
You can use the lpm_mult megafunction to configure the DSP block for
simple multiplier mode. You can set the lpm_mult Multiplier
Implementation option in the MegaWizard Plug-In Manager to either
use the default implementation, ESBs, or the DSP blocks. If you select the
Use Default option, the compiler first attempts to place the multiplier in
the DSP blocks. However, under certain conditions, the compiler may
implement the multiplier in LEs. The placement depends on factors such
as DSP block resource consumption, the width of the multiplier, whether
an operand is a constant, and other options chosen for the megafunction.
Stratix and Stratix GX devices do not support the Use ESBs option. If you
select this option, the Quartus II software tries to place the multiplier in
unused DSP blocks.
You can recompile APEX II or APEX 20K designs using the lpm_mult
megafunction for Stratix and Stratix GX devices in the Quartus II
software without changing the megafunction. This makes converting
lpm_mult megafunction designs to Stratix or Stratix GX devices
straightforward.
Simple multiplier mode
Multiply-accumulator mode
Two-multipliers adder mode
Four-multipliers adder mode
Altera Corporation
July 2005
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