EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 613

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
September 2004
Implementing High Performance DSP Functions in Stratix & Stratix GX Devices
Figure 7–20. Direct Form II Structure of an IIR Filter
The transfer function for an IIR filter is:
The numerator contains the zeros of the filter and the denominator
contains the poles. The IIR filter structure requires a multiplication
followed by an accumulation. Constructing the filter directly from the
transfer function shown above may result in finite word length
limitations and make the filter potentiality unstable. This becomes more
critical as the filter order increases, because it only has a finite number of
bits to represent the output. To prevent overflow or instability, the
transfer function can be split into two or more terms representing several
second order filters called biquads. These biquads can be individually
scaled and cascaded, splitting the poles into multiples of two. For
example, an IIR filter having ten poles should be split into five biquad
sections. Doing this minimizes quantization and recursive accumulation
errors.
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Stratix Device Handbook, Volume 2
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7–35