EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 807

IC STRATIX FPGA 10K LE 484-FBGA

EP1S10F484I6

Manufacturer Part Number
EP1S10F484I6
Description
IC STRATIX FPGA 10K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheets

Specifications of EP1S10F484I6

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
335
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
335
Frequency (max)
450.05MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
484
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant

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Figure 12–16. Converting POF Programming File to Intel HEX Format
Altera Corporation
September 2004
The initial programming file (POF) can be converted to an Intel
Hexadecimal format file (*.HEXOUT) using the Quartus II CPF utility.
See
Partial Programming File Generation
The enhanced Quartus II CPF utility allows an existing application
configuration page to be replaced with new data. Partial programming
files are generated to perform such configuration data updates.
In order to generate a partial programming file, you have to input the
initial programming file (POF) and new configuration data (SOF) to the
Quartus II CPF utility. In addition, you have to specify the addressing
mode (auto or manual) that was used during initial POF creation. And if
Figure
12–16.
Remote System Configuration with Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
12–29

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