PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 162

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

Table 42
Register
FMR2.ALMF = 1
FMR2.FRS1/0 = 11 In the interworking mode the FALC
Table 43
Register
MODE = 88
CCR1 = 18
IMR0.RME = 0
IMR0.RPF = 0
IMR1.XPR = 0
RTR3.TS16 = 1
TTR3.TS16 = 1
Table 44
Register
XSP.CASEN = 1
IMR0.CASC = 0
•
Note: After the device initialization a software reset should be executed by setting
Data Sheet
of bits CMDR.XRES/RRES.
H
H
Framer Initialization (E1) (cont’d)
HDLC Controller Initialization (E1)
CAS-CC Initialization (E1)
Function
The receiver initiates a new basic- and multiframing research if
more than 914 CRC4 errors have been detected in one second.
format if no multiframe pattern could be found in a time interval of
400 ms. This is also indicated by a 400 ms interrupt. Additionally
the extended interworking mode (FMR3.EXTIW = 1) will activate
after 400 ms the remote alarm (FMR2.AXRA = 1) and will still
search the multiframing without switching completely to the double
framing. A complete resynchronization in an 8 ms interval is not
initiated.
Function
HDLC Receiver active, no address comparison.
Enable Signaling via TS0...31, Interframe Time Fill with
continuous FLAGs.
Unmask interrupts for HDLC processor requests.
Select TS16 for HDLC data reception and transmission.
Function
Send CAS info stored in the XS1...16 registers.
Enable interrupt with any data change in the RS1...16 registers.
162
®
-LH stays in double framing
Operational Description E1
FALC-LH V1.3
PEB 2255
2000-07