PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 276
PEB2255H-V13
Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2255H-V13.pdf
(374 pages)
Specifications of PEB2255H-V13
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN
PEB2255H-V13IN
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
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Framer Mode Register 2 (Read/Write)
Value after RESET: 00
MCSP…
SSP…
Data Sheet
FMR2
7
Multiple Candidates Synchronization Procedure
Select Synchronization/Resynchronization Procedure
Together with bit FMR2.SSP the synchronization mode of the receive
framer is defined:
MCSP/SSP:
00… F12/72 format:
01… F12/72:
10… F24:
MCSP
H
Specified number of errors in both FT framing and FS framing
lead to loss of sync (FRS0.LFA is set). In the case of FS bit
framing errors, bit FRS0.LMFA is set additionally. A complete
new synchronization procedure is initiated to regain pulseframe
alignment and then multiframe alignment.
F24:
normal operation: synchronization is achieved only on
verification the framing pattern.
Specified number of errors in FT framing has the same effect
as above. Specified number of errors in FS framing only
initiates a new search for multiframe alignment without
influencing pulseframe synchronous state (FRS0.LMFA is set).
F24:
Synchronous state is reached when three consecutive
multiframe pattern are correctly found independent of the
occurrence of CRC6 errors.
A one enables a synchronization mode which is able to choose
multiple framing pattern candidates step by step. I.e. if in
synchronous state the CRC error counter indicates that the
synchronization might have been based on an alias framing
pattern, setting of FMR0.FRS leads to synchronization on the
next candidate available. However, only the previously
assumed candidate is discarded in the internal framing pattern
memory. The latter procedure can be repeated until the
SSP
DAIS
276
SAIS
PLB
AXRA
FALC-LH V1.3
T1/J1 Registers
EXZE
0
PEB 2255
2000-07
(1C)
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