PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 281

IC INTERFACE LINE 80-MQFP

PEB2255H-V13

Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2255H-V13

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
AUTO…
FM1…0…
Framer Mode Register 5 (Read/Write)
Value after RESET: 00
SRS…
EIBR…
Note: Bit FMR1.SIGM has also to be set, if bit-robbing mode is to be used.
XLD…
Data Sheet
FMR5
SRS
7
Enable Auto Resynchronization
0…
1…
Select Frame Mode
FM = 0: 12-frame multiframe format (F12, D3/4)
FM = 1: 4-frame multiframe format (F4)
FM = 2: 24-frame multiframe format (ESF)
FM = 3: 72-frame multiframe format (F72, remote switch mode)
Signaling Register SIze
Valid in F12/F72 frame format only
0…
1…
Enable Internal Bit-Robbing Access
0…
1…
Transmit Line Loopback (LLB) Down Code
0…
1…
EIBR
H
The receiver does not resynchronize automatically. Starting a
new synchronization procedure is possible via the bits:
FMR0.EXLS or FMR0.FRS.
Auto-resynchronization is enabled.
Signaling access is done via registers RS/XS1...6
Signaling access is done via increased register bank RS/
XS1...12
Normal operation (no bit-robbing).
CAS Bit-robbing mode selected
Normal operation.
A one in this bit position causes the transmitter to replace
normal transmit data with the LLB down (deactivate) code
continuously until this bit is reset. The LLB down code is
optionally overwritten by the framing/DL/CRC bits. For correct
operation bit FMR5.XLU must be cleared
XLD
XLU
281
SRO
XTM
RTF
FALC-LH V1.3
T1/J1 Registers
0
PEB 2255
2000-07
(1F)

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