PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 177

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

Byte sampling in BOM Mode (T1/J1)
a)
b)
Two different BOM reception modes can be programmed (by CCR1.BRM).
10 byte packets: CCR1.BRM = 0
After storing 10 bytes in RFIFO the receive status byte marking a BOM frame
(RSIS.HFR) is added as the eleventh byte and an interrupt (ISR0.RME) is generated.
The sampling of data bytes continues and interrupts are generated every 10 bytes until
an HDLC flag is detected.
Continuous reception: CCR1.BRM = 1
Interrupts are generated every 32 (16, 4, 2) bytes. After detecting an HDLC flag, byte
sampling is stopped, the receive status byte is stored in RFIFO and an RME interrupt is
generated.
The user may switch between these modes at any time. Byte sampling may be stopped
by deactivating the BOM receiver (MODE.BRAC). In this case the receive status byte is
added, an interrupt is generated and HDLC-mode is entered. Whether the FALC
operates in HDLC or BOM mode may be checked by reading the Signaling Status
Register (SIS.BOM).
Data Sheet
1111
1111
sync
sync
1111 1111 0011 0100 1111 1111 0011 0100 1110 1111 0011 0100 1101 1111
1111 0111 0110 1101 1111 0111 0110 1111 1111 0111 0110 0111 1111
not stored
stored
1.byte
corrupted
1.corrupted
sync
sync
new sync
stored
2.byte
177
stored
1.byte
Signaling Controller Operating Modes
1.corrupted
2.sync
sync
stored
3.byte
2.byte
stored
FALC-LH V1.3
3.corrupted
PEB 2255
2.corrupted
sync
sync
2000-07
®
-LH