PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 32

IC INTERFACE LINE 80-MQFP

PEB2255H-V13

Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2255H-V13

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
Table 3
Pin No.
7
6
10
9
79
Data Sheet
XTAL1
Symbol
XTAL2
XTAL3
XTAL4
XCLK
FSC
Pin Definitions - Clock Generation
Input (I)
Output (O)
Supply (S)
I
O
I
O
O
O
Function
Crystal Connection 16.384 MHz
A pullable crystal of 16.384 MHz has to be
provided at these pins, if jitter attenuation of the
system clocks is done internally.
If not, or if crystal-less jitter attenuation is used,
either a regular crystal of 16.384 MHz has to be
connected to XTAL1/XTAL2 or a 16.384-MHz
clock must be connected to XTAL1 while XTAL2
is left open.
Crystal Connection
16.384 MHz (E1)/12.352 MHz (T1/J1)
A pullable crystal of 16.384 MHz/12.352 MHz is
only required at these pins, if jitter attenuation of
the transmit clocks is done internally. If jitter
attenuation is provided externally, the jitter
attenuated clock of 16.384 MHz/12.352 MHz
has to be applied to XTAL3 while XTAL4 is left
open.
If crystal-less jitter attenuation is used, either a
regular crystal of16.384 MHz/12.352 MHz has to
be connected to XTAL3/XTAL4 or a 16.384-
MHz/12.352-MHz clock has to be connected to
XTAL3 while XTAL4 is left open.
E1 mode only:
If no transmit jitter attenuation is required,
XTAL3 should be connected to V
XTAL4 is to be left open.
Transmit Clock
Transmit clock of 2.048 MHz (E1) or 1.544 MHz
(T1/J1). This clock is driven from SCLKX or
RCLK or generated internally.
8 kHz Frame Synchronization Pulse
is output on this pin, if LIM1.EFSC = 1 is
selected. The synchronization pulse is active
high for one cycle (pulse width = 488 ns) and
derived from the clock supplied on pin CLK16M.
32
Pin Descriptions
FALC-LH V1.3
DD
or V
PEB 2255
SS
2000-07
,

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