PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 202

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

EBP…
AXS…
XSIF…
XS13…
Data Sheet
E-Bit Polarity
0…
1…
If automatic transmission of sub-multiframe status is enabled by
setting bit XSP.AXS and the receiver has been lost multiframe
synchronization, the E bit with the programmed polarity is inserted
automatically in S
(under the condition that time slot 0 transparent mode and
transparent S
Automatic Transmission of Submultiframe Status
Only applicable to CRC multiframe.
0…
1…
Transmit Spare Bit For International Use (FAS Word)
First bit in the FAS word. Only significant in doubleframe format. If not
used, this bit should be fixed to ‘1’. If one of the time slot 0 transparent
modes is enabled (bits XSP.TT0, or TSWM.TSIF), bit XSP.XSIF is
ignored.
Transmit Spare Bit (Frame 13, CRC-Multiframe)
First bit in the service word of frame 13 for international use. Only
significant in CRC-multiframe format. If not used, this bit should be
fixed to ‘1’. The information of XSP.XS13 is shifted into internal
transmission buffer with beginning of the next following transmitted
CRC multiframe.
If automatic transmission of submultiframe status is enabled via bit
XSP.AXS, or, if one of the time slot 0 transparent modes XSP.TT0 or
TSWM.TSIS is enabled, bit XSP.XS13 is ignored.
loops). Priority sequence of transparent modes: XSP.TT0 >
TSWM.
In the basic framing or multiframe asynchronous state the E-bit
is cleared.
In the basic framing or multiframe asynchronous state the E-bit
is set.
Normal operation.
Information of submultiframe status bits RSP.SI1 and RSP.SI2
is inserted automatically in S
multiframe (RSP.SI1
frame 15). Contents of XSP.XS13 and XSP.XS15 is ignored. If
one of the time slot 0 transparent modes XSP.TT0 or
TSWM.TSIS is enabled, bit XSP.AXS has no function.
i
bit in service word are both disabled).
i
-bit position of every outgoing CRC multiframe
202
S
i
-bit of frame 13; RSP.SI2
i
-bit positions of the outgoing CRC
FALC-LH V1.3
E1 Registers
PEB 2255
S
2000-07
i
-bit of