PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 318

IC INTERFACE LINE 80-MQFP

PEB2255H-V13

Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2255H-V13

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB2255H-V13
Manufacturer:
Infineon Technologies
Quantity:
10 000
CRC Error Counter (Read)
CR15…0…
Data Sheet
CECH
CECL
CR15
CR7
7
7
CRC Errors
No function if CRC6 procedure or ESF format are disabled.
In ESF mode, the 16-bit counter is incremented when a multiframe
has been received with a CRC error. CRC errors are not counted
during asynchronous state. The error counter doesn’t roll over.
During alarm simulation, the counter is incremented once per
multiframe.
Clearing and updating the counter is done according to bit
FMR1.ECM.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DCEC
has to be set. With the rising edge of this bit updating the buffer is
stopped and the error counter is reset. Bit DEC.DCEC is reset
automatically with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter is latched and then automatically reset. The latched error
counter state should be read within the next second.
318
FALC-LH V1.3
T1/J1 Registers
CR0
CR8
0
0
PEB 2255
2000-07
(54)
(55)

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