PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 30

• Manufacturer Part Number: PEB2255H-V13
• Description: IC INTERFACE LINE 80-MQFP
• Manufacturer: Infineon Technologies

Specifications of PEB2255H-V13

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 80-SQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PEB2255H-V13; PEB2255H-V13IN

Table 2
Pin No.
15
Data Sheet
XL1
Symbol
XDOP
XOID
Pin Definitions - Line Interface (cont’d)
Input (I)
Output (O)
Supply (S)
O (analog)
O
O
Line Interface Transmit
Function
Transmit Line 1
Analog output to the external transformer.
Selected if LIM1.DRS = 0. After reset this pin is
in a high impedance state until bit FMR0.XC1 is
set.
Transmit Data Output Positive
This digital output for transmitted dual rail
PCM(+) route signals can provide
- half bauded signals with 50% duty cycle
(LIM0.XFB = 0) or
- full bauded signals with 100% duty cycle
(LIM0.XFB = 1)
The data will be clocked off on the positive
transitions of XCLK in both cases. Output
polarity is selected by bit LIM0.XDOS (after
reset: active low). The dual rail mode is selected
if LIM1.DRS = 1 and FMR0.XC1 = 1. After reset
this pin is in a high impedance state until register
LIM1.DRS is set.
Transmit Optical Interface Data
Unipolar data sent to fiber optical interface with
2048 kbit/s (E1) or 1544 kbit/s (T1/J1) which will
be clocked off on the positive transitions of
XCLK. Clocking off data in NRZ code is done
with 100% duty cycle. Data in CMI code (E1
only) are shifted out with 50% or 100% duty
cycle according to the CMI coding. Output
polarity is selected by bit LIM0.XDOS (after
reset: data is sent active high).
The single rail mode is selected if LIM1.DRS = 1
and FMR0.XC1 = 0. After reset this pin is in a
high impedance state until register LIM1.DRS is
set. If LOOP.SPN = 1 this pin function is not
defined and should be tristated by enabling
XPM2.XLT.
30
Pin Descriptions
FALC-LH V1.3
PEB 2255
2000-07