PEB2255H-V13 Infineon Technologies, PEB2255H-V13 Datasheet - Page 211
PEB2255H-V13
Manufacturer Part Number
PEB2255H-V13
Description
IC INTERFACE LINE 80-MQFP
Manufacturer
Infineon Technologies
Datasheet
1.PEB2255H-V13.pdf
(374 pages)
Specifications of PEB2255H-V13
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
80-SQFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PEB2255H-V13
PEB2255H-V13IN
PEB2255H-V13IN
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Manufacturer
Quantity
Price
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Part Number:
PEB2255H-V13
Manufacturer:
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XLU…
CMI…
SA6SY…
CFRZ…
EXTIW…
Data Sheet
Transmit LLB UP Code
0…
1…
Select CMI Precoding
Only valid if CMI code (FMR0.XC1/0=01) is selected. This bit defines
the CMI precoding and influences only the transmit data and not the
receive data.
0…
1…
Receive SA6 Access Synchronous Mode
Only valid if multiframe format (FMR2.RFS1/0=1x) is selected.
0…
1…
Enable CAS Freeze Output
This bit selects the function of pin RFSPQ.
0…
1…
Extended CRC4 to Non CRC4 Interworking
Only valid in multiframe format. This bit selects the reaction of the
synchronizer after the 400 ms timeout has been elapsed and starts
transmitting a remote alarm if FMR2.AXRA is set.
0…
LCR1.LLBF. For correct operation bit FMR3.XLU must be
cleared.
Normal operation.
A one in this bit position causes the transmitter to replace
normal transmit data with the LLB UP Code continuously until
this bit is reset. The LLB UP Code is overwritten by the timeslot
0 depending on bit LCR1.LLBF. For correct operation bit
FMR3.XLD must be cleared.
CMI with HDB3 precoding
CMI without HDB3 precoding
The detection of the predefined SA6 bit pattern (refer to chapter
SA6 Bit Detection according to ETS 300233) is done
independently of the multiframe synchronous state.
The detection of the SA6 bit pattern is done synchronously to
the multiframe.
The receive frame synchronous pulse is output on pin RFSPQ.
The synchronous status of the integrated CAS controller
(FRS1.TS16LFA) is output on pin RFSP. If the CAS
synchronizer lost its synchronization this pin is set high.
The CRC4 to Non CRC4 interworking is done as described in
ITU-T G. 706 Annex B.
211
FALC-LH V1.3
E1 Registers
PEB 2255
2000-07
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