r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1004

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 23 Gigabit Ethernet Controller (GETHER)
Figure 23.2 shows the frame data path and an overview of each setting.
Rev. 1.00 Oct. 01, 2007 Page 938 of 1956
REJ09B0256-0100
Transmit request
EDTRR0.TR=11
E-DMAC-0
ECMR0.TE=1
Transmitter startup
EDSR0.ENT=1
Transmission
enabled
TSU
TSU_PRISL0
Determination
of priority
Transmit FIFO Receive FIFO
Transmit
data buffer
GMII/MII/RMII
DMA transfer
E-MAC-0
PHY-0
Port 0
Figure 23.2 GETHER Data Path and Various Settings
reference
Receive
data buffer
CAM
Receive request
EDRRR0.RR=1
Receiver startup
EDSR0.ENR=1
ECMR0.RE=1
Reception
enabled
reference
CAM
Descriptor
access
(Reference setting:
TSU_TEN, TSU_FWSLC)
CAM control
(32 entries × 48 bits)
SuperHyway (SHwy) bridge bus
CAM entry table
TSU_FWEN0.FWEN1=1
TSU_FWEN0.FWEN0=1
Relay enable
Relay enable
Relay FIFO (1 to 0)
Relay FIFO (1 to 0)
GETHER
In memory
Descriptor
access
Transmit request
EDTRR1.TR=11
ECMR1.RE=1
Reception
enabled
Transmitter startup
EDSR1.ENT=1
reference
CAM
Transmit FIFO
Transmit
data buffer
reference
CAM
DMA transfer
GMII/MII/RMII
E-MAC-1
PHY-1
Port 1
Receive FIFO
TSU_PRISL1
Determination
of priority
Receive
data buffer
Receive request
EDRRR1.RR=1
Receiver startup
EDSR1.ENR=1
ECMR1.TE=1
Transmission
enabled
E-DMAC-1