r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 60

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Table 15.4
Table 15.5
Section 16 Clock Pulse Generator (CPG)
Table 16.1
Table 16.2
Table 16.3
Table 16.4
Section 17 Watchdog Timer and Reset (WDT)
Table 17.1
Table 17.2
Table 17.3
Section 18 Power-Down Mode
Table 18.1
Table 18.2
Table 18.3
Table 18.4
Table 18.5
Section 19 Timer Unit (TMU)
Table 19.1
Table 19.2
Table 19.3
Table 19.4
Section 20 16-Bit Timer Pulse Unit (TPU)
Table 20.1
Table 20.2
Table 20.3
Table 20.4
Table 20.5
Table 20.6
Table 20.6
Table 20.6
Table 20.6
Table 20.7
Table 20.8
Table 20.9
Table 20.10
Table 20.11
Table 20.12
Rev. 1.00 Oct. 01, 2007 Page lx of lxvi
Access and Data Alignment for Little Endian ...................................................... 618
Access and Data Alignment for Big Endian ......................................................... 619
Pin Configuration and Functions of CPG ............................................................... 82
Clock Operating Modes .......................................................................................... 83
Register Configuration............................................................................................ 84
Register States in Each Operating Mode ................................................................ 84
Pin Configuration.................................................................................................... 81
Register Configuration............................................................................................ 82
Register State in Each Operating Mode.................................................................. 82
States in Power-Down Modes............................................................................... 654
Pin Configuration.................................................................................................. 655
Register Configuration.......................................................................................... 656
Register States in Each Operating Mode .............................................................. 656
Pin Configuration.................................................................................................. 670
Pin Configuration.................................................................................................. 675
Register Configuration.......................................................................................... 676
Register States in Each Operating Mode .............................................................. 677
TMU Interrupt Sources......................................................................................... 690
TPU Functions ...................................................................................................... 694
TPU Pin Configurations........................................................................................ 696
Register Configuration.......................................................................................... 697
Register State in Each Operating Mode................................................................ 699
TPU Clock Sources............................................................................................... 702
TPSC[2:0] (1) ....................................................................................................... 703
TPSC[2:0] (2) ....................................................................................................... 703
TPSC[2:0] (3) ....................................................................................................... 703
TPSC[2:0] (4) ....................................................................................................... 704
IOA[2:0] ............................................................................................................... 708
Register Combinations in Buffer Operation ......................................................... 720
Phase Counting Mode Clock Input Pins ............................................................... 726
Up/Down-Count Conditions in Phase Counting Mode 1.................................. 728
Up/Down-Count Conditions in Phase Counting Mode 2.................................. 729
Up/Down-Count Conditions in Phase Counting Mode 3.................................. 730