r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1069

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Bit
21, 20
19, 18
17, 16
Bit Name

STMP[1:0] 00
WORK[1:0] 00
Initial
Value
All 0
R/W
R/W
R
R/W
Description
Time Stamp
At reception: These bits select whether to add a fixed
value, add the time stamp, or do not add any value
when transferring the receive packet to external
memory.
00: Adds a fixed value to the receive packet and
01: Adds the time stamp to the receive packet and
10: Transfers the receive packet to external memory
11: Setting prohibited
At transmission: These bits select the packet interval
for transmitting the transmit packet.
00: Packet interval is in accordance with the ICYC bits
01: Packet interval is in accordance with the time stamp
10, 11: Setting prohibited
Reserved
These bits are always read as 0. The write value should
always be 0.
Work Area Size
These bits specify the work area size allocated at the
front of the packet in external memory.
00: Work area is 0 bytes
01: Work area is 16 bytes
10: Work area is 32 bytes
11: Work area is 48 bytes
transfers it to external memory
transfers it to external memory
without any changes
(only when the packet size is 192 bytes)
in STICR
Rev. 1.00 Oct. 01, 2007 Page 1003 of 1956
Section 25 Stream Interface (STIF)
REJ09B0256-0100