r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1219

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Table 28.7 SCSMR and SCSCR Settings for SCIF Clock Source Selection
SCSMR SCSCR Setting
Bit 7
C/A
0
1
Bit 1
CKE1
0
1
1
0
Bit 0
CKE0
0
1
0
1
0
1
Section 28 Serial Communication Interface with FIFO/IrDA Interface (SCIF/IrDA)
Mode
Asynchronous
Prohibited
Clock
synchronous
Clock Source
Internal clock
Pck0, Pck0/4,
Pck0/16,
Pck0/64
Input SC_CLK to
baud rate
generator for
external clock
(SCIF_CLK,
Pck0) or SCK
(switched by
baud rate
generator's CKS
register)
Internal clock
Pck0, Pck0/4,
Pck0/16,
Pck0/64
Rev. 1.00 Oct. 01, 2007 Page 1153 of 1956
Description of SCK Pin
The SCK pin is not used.
The SCK pin functions as an input
pin
(Input signals are ignored).
(Initial value)
The SCK pin outputs the clock
(with a frequency 16 times the bit
rate).
The SCK pin inputs the clock
(with a frequency 16 times the bit
rate).
When SC_CLK is selected, the
SCK pin inputs the clock (Input
signals are ignored).
Set the SCK input or SC_CLK so
that the frequency of BRGCLK is
16 times the bit rate.
When selecting SC_CLK, set the
frequency of SC_CLK and DL, or
when selecting SCK, adjust the
frequency of the SCK input to
make the frequency of BRGCLK
16 times the bit rate.
The SCK pin outputs the
synchronization clock.
The SCK pin outputs the
synchronization clock.
REJ09B0256-0100

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