r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1320

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 30 SIM Card Module (SIM)
Rev. 1.00 Oct. 01, 2007 Page 1254 of 1956
REJ09B0256-0100
Bit
5
4
Bit Name
ORER
ERS
Initial
Value
0
0
R/W
R/W
R/W
Description
Overrun Error
Indicates that an overrun error occurred during reception,
resulting in abnormal termination.
0: Indicates that reception is in progress, or that reception
[Clearing conditions]
•
•
1: Indicates that an overrun error occurred during
[Setting condition]
When the RDRF bit is set to 1 and the next serial reception
is completed.
Notes:
Error Signal Status
Indicates the status of error signals returned from the
receive side during transmission. In T = 1 mode, this flag is
not set.
0: Indicates that an error signal indicating detection of a
[Clearing conditions]
•
•
1: Indicates that an error signal indicating detection of a
[Setting condition]
When an error signal is sampled.
Note:
parity error was not sent from the receive side
parity error was sent from the receive side
was completed normally*
reception*
On reset
When 0 is written to the ORER bit
On reset
When 0 is written to the ERS bit
Even if the TE bit in SCSCR is cleared to 0, the
ERS flag is unaffected, and the previous state is
retained.
1. When the RE bit in SCSCR is cleared to 0, the
2. In SCRDR, the received data before the
ORER flag is unaffected and the previous state
is retained.
overrun error occurred is lost, and the data that
had been received at the time when the
overrun error occurred is retained. Further, with
the ORER bit set to 1, subsequent serial
reception cannot be continued.
2
1