r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1376

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 31 Multimedia Card Interface (MMCIF)
31.3.12 Interrupt Control Registers 0 and 1 (INTCR0, INTCR1)
The INTCR registers enable or disable the INTSTR0 and INTSTR1 flags and control the interrupt
outputs.
• INTCR0
Rev. 1.00 Oct. 01, 2007 Page 1310 of 1956
REJ09B0256-0100
Bit
7
6
5
4
3
2
1
Bit Name
FEIE
FFIE
DRPIE
DTIE
CRPIE
CMDIE
DBSYIE
Initial value:
Initial
Value
0
0
0
0
0
0
0
R/W:
Bit:
FEIE
R/W
7
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FFIE
R/W
6
0
Description
FIFO Empty Flag Enable
0: Disables FIFO empty flag setting.
1. Enables FIFO empty flag setting.
FIFO Full Flag Enable
0: Disables FIFO full flag setting.
1: Enables FIFO full flag setting.
Data Response End Flag Enable
0: Disables data response end flag setting.
1: Enables data response end flag setting.
Data Transfer End Flag Enable
0: Disables data transfer end flag setting.
1: Enables data transfer end flag setting.
Command Response End Flag Enable
0: Disables command response end flag setting.
1: Enables command response end flag setting.
Command Output End Flag Enable
0: Disables command output end flag setting.
1: Enables command output end flag setting.
Data Busy End Flag Enable
0: Disables data busy end flag setting.
1: Enables data busy end flag setting.
DRPIE
R/W
5
0
DTIE
R/W
4
0
CRPIE CMDIE DBSYIE BTIE
R/W
3
0
R/W
2
0
R/W
1
0
R/W
0
0