r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 129

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Note: For the addressing modes below that use a displacement (disp), the assembler descriptions
Addressing
Mode
Immediate
in this manual show the value before scaling (×1, ×2, or ×4) is performed according to the
operand size. This is done to clarify the operation of the LSI. Refer to the relevant
assembler notation rules for the actual assembler descriptions.
@ (disp:4, Rn)
@ (disp:8, GBR) ; GBR indirect with displacement
@ (disp:8, PC)
disp:8, disp:12
Instruction
Format
#imm:8
#imm:8
#imm:8
; Register indirect with displacement
; PC-relative with displacement
; PC-relative
Effective Address Calculation Method
8-bit immediate data imm of TST, AND, OR, or
XOR instruction is zero-extended.
8-bit immediate data imm of MOV, ADD, or
CMP/EQ instruction is sign-extended.
8-bit immediate data imm of TRAPA instruction is
zero-extended and multiplied by 4.
Rev. 1.00 Oct. 01, 2007 Page 63 of 1956
Section 3 Instruction Set
Calculation
Formula
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REJ09B0256-0100