r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 489

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

12.4.3
STR specifies the DDR-SDRAM timing. (Details on the number range depend on the parameters
used by each memory manufacturer.
Initial value:
Initial value:
Initial value:
Initial value:
Bit
63 to 20 
19, 18
R/W:
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
Bit:
DDR-SDRAM Timing Register (STR)
Bit Name
WR
R/W
63
47
31
15
R
R
R
0
0
0
0
SRFC
R/W
62
46
30
14
R
R
R
0
0
0
0
R/W
Initial
Value
All 0
00
61
45
29
13
R
R
R
0
0
0
0
SWR
R/W
60
44
28
12
R
R
R
0
0
0
0
SRRD
R/W
R
R/W
R/W
59
43
27
11
R
R
R
0
0
0
0
R/W
58
42
26
10
R
R
R
0
0
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Minimum Number of Cycles from Write command to
Read Commands
These bits specify the minimum number of cycles for
the READ command issuance after the WRITE
command is issued for the DDR-SDRAM.
00: 3 cycles
01: 4 cycles
10: 5 cycles
11: 6 cycles
SRAS
R/W
57
41
25
R
R
R
0
0
0
0
9
R/W
56
40
24
R
R
R
0
0
0
8
0
R/W
55
39
23
R
R
R
0
0
0
7
0
Section 12 DDR-SDRAM Interface (DDRIF)
Rev. 1.00 Oct. 01, 2007 Page 423 of 1956
SRC
R/W
54
38
22
R
R
R
0
0
0
6
0
R/W
53
37
21
R
R
R
0
0
0
5
0
R/W
52
36
20
R
R
R
0
0
0
4
0
R/W
SCL
R/W
51
35
19
R
R
0
0
0
3
0
WR
REJ09B0256-0100
R/W
R/W
50
34
18
R
R
0
0
0
2
0
SRCD
R/W
R/W
49
33
17
R
R
0
0
0
1
0
RW
SRP
R/W
R/W
47
32
16
R
R
0
0
0
0
0