r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 1472

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 33 Audio Codec Interface (HAC)
33.3.9
HACRSR is a 32-bit read/write register that indicates the status of the HAC RX controller.
Writing 0 to the bit will initialize it.
Initial value:
Initial value:
Rev. 1.00 Oct. 01, 2007 Page 1406 of 1956
REJ09B0256-0100
Bit
31 to 23
22
21
20
19
18 to 14
R/W:
R/W:
Bit:
Bit:
RX Status Register (HACRSR)
Bit Name
STARY
STDRY
PLRFRQ
PRRFRQ
31
15
R
R
0
0
30
14
R
R
0
0
PLR
FOV
R/W
0
Initial
Value
All 0
0
0
0
All 0
29
13
R
0
0
PRR
FOV
R/W
28
12
R
0
0
R/W
R
R/W
R/W
R/W
R/W
R
27
11
R
R
0
0
26
10
R
R
0
0
Description
Reserved
Always 0 for read and write.
Status Address Ready
0: HACCSAR (status address) is not ready.
1: HACCSAR (status address) is ready.
Status Data Ready
0: HACCSDR (status data) is not ready.
1: HACCSDR (status data) is ready.
PCML RX Request
0: PCML RX data is not ready.
1: PCML RX data is ready and must be read. In DMA
PCMR RX Request
0: PCMR RX data is not ready.
1: PCMR RX data is ready and must be read. In DMA
Reserved
Always 0 for read and write.
mode, reading HACPCML automatically clears this
bit to 0.
mode, reading HACPCMR automatically clears this
bit to 0.
25
R
R
0
9
0
24
R
R
0
8
0
23
R
R
0
7
0
R/W
STA
RY
22
R
0
6
0
STD
R/W
RY
21
R
0
5
0
FRQ
PLR
R/W
20
R
0
4
0
PRR
FRQ
R/W
19
R
0
3
0
18
R
R
0
2
0
17
R
R
0
1
0
16
R
R
0
0
0

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