r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 127

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Addressing
Mode
GBR indirect
with
displacement
Indexed GBR
indirect
PC-relative
with
displacement
Instruction
Format
@(disp:8,
GBR)
@(R0, GBR)
@(disp:8, PC) Effective address is PC + 4 with 8-bit
Effective Address Calculation Method
Effective address is register GBR contents with
8-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the operand
size.
Effective address is sum of register GBR and R0
contents.
displacement disp added. After disp is zero-
extended, it is multiplied by 2 (word), or 4
(longword), according
to the operand size. With a longword operand,
the lower 2 bits of PC are masked.
(zero-extended)
H'FFFF FFFC
GBR
(zero-extended)
1/2/4
GBR
disp
R0
PC
4
disp
2/4
×
& *
+
+
×
* With longword operand
+
+
Rev. 1.00 Oct. 01, 2007 Page 61 of 1956
+ disp × 1/2/4
GBR + R0
PC + 4 + disp
+ 4 + disp × 4
H'FFFF FFFC
GBR
or PC &
× 2
Section 3 Instruction Set
Calculation
Formula
Byte: GBR +
disp → EA
Word: GBR +
disp × 2 → EA
Longword: GBR
+ disp × 4 → EA
GBR + R0 → EA
Word: PC + 4 +
disp × 2 → EA
Longword:
PC & H'FFFF
FFFC + 4 + disp
× 4 → EA
REJ09B0256-0100