r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 314

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 9 Interrupt Controller (INTC)
9.3.2
ICR1 is a 32-bit readable/writable register that specifies the individual input signal detection
modes of external interrupt input pins IRQ7/IRL7 to IRQ4/IRL4. This setting is valid only when
using IRL7 to IRL4 and IRL3 to IRL0 as IRQ independent interrupts input to set the IRLM0 and
IRLM1 bits to 1 in ICR0.
Initial value:
Initial value:
Rev. 1.00 Oct. 01, 2007 Page 248 of 1956
REJ09B0256-0100
Bit
22
21 to 0
R/W:
R/W:
Bit:
Bit:
Interrupt Control Register 1 (ICR1)
Bit Name
IRLM1

R/W
31
15
−
R
0
0
IRQ0S
R/W
30
14
−
R
0
0
Initial
Value
0
All 0
R/W
29
13
−
R
0
0
IRQ1S
R/W
28
12
−
R
0
0
R/W
R/W
R/W
R
27
11
−
R
0
0
IRQ2S
R/W
26
10
−
R
0
0
Description
IRL Pin Mode 1
Selects whether IRQ7/IRL7 to IRQ4/IRL4 are used as
the 4-bit encoded interrupt requests or as four
independent interrupts.
0: IRQ7/IRL7 to IRQ4/IRL4 are used as the 4-bit level-
1: IRQ7/IRL7 to IRQ4/IRL4 are used as four
Note: The level-encoded IRL interrupt is not detected
Reserved
These bits are always read as 0. The write value should
always be 0.
R/W
25
encoded interrupt requests (IRL [7:4] interrupt; initial
value)
independent interrupt requests (IRQ [n] interrupt; n
= 7 to 4)
−
R
0
9
0
IRQ3S
unless the pin levels sampled at every bus
clock cycle remain unchanged for four
consecutive cycles.
R/W
24
−
R
0
8
0
R/W
23
−
R
0
7
0
IRQ4S
R/W
22
−
R
0
6
0
R/W
21
−
R
0
5
0
IRQ5S
R/W
20
−
R
0
4
0
R/W
19
R
−
0
3
0
IRQ6S
R/W
18
−
R
0
2
0
R/W
17
−
R
0
1
0
IRQ7S
R/W
16
−
R
0
0
0