r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 526

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r5s77631ay266bgv

Manufacturer Part Number
r5s77631ay266bgv
Description
Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 13 PCI Controller (PCIC)
[Legend] x: Undefined
13.3.1
Rev. 1.00 Oct. 01, 2007 Page 460 of 1956
REJ09B0256-0100
Initial value:
Initial value:
Name
PCI memory bank mask register 2
PCI I/O bank register
PCI I/O bank master register
PCI cache snoop control register 0
PCI cache snoop control register 1
PCI cache snoop address register 0 PCICSAR0
PCI cache snoop address register 1 PCICSAR1
PCI PIO data register
Bit
31 to 1
0
R/W:
R/W:
Bit:
Bit:
PCIC Enable Control Register (PCIECR)
Bit Name
ENBL
31
15
R
R
0
0
30
14
R
R
0
0
Initial
Value
All 0
0
29
13
R
R
0
0
28
12
R
R
0
0
R/W
R
R/W
Abbreviation
PCIMBMR2
PCIIOBR
PCIIOBMR
PCICSCR0
PCICSCR1
PCIPDR
27
11
R
R
0
0
26
10
R
R
0
0
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
PCI Enable Bit.
Enable the PCIC
0: PCIC disable
1: PCIC enable
25
The access from both the CPU and external PCI
devices to the PCIC is invalid (including the
configuration and local register), except PCIECR.
R
R
0
9
0
Power-On
Reset
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
H'0000 0000 H'0000 0000 Retained
H'xxxx xxxx
24
R
R
0
8
0
23
R
R
0
7
0
Manual
Reset
H'xxxx xxxx
22
R
R
0
6
0
21
R
R
0
5
0
20
R
R
Sleep Mode
Retained
0
4
0
19
R
R
0
3
0
18
R
R
0
2
0
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
17
R
R
0
1
0
ENBL
R/W
16
R
0
0
0

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