r5s77631ay266bgv Renesas Electronics Corporation., r5s77631ay266bgv Datasheet - Page 28

• Manufacturer Part Number: r5s77631ay266bgv
• Description: Renesas 32-bit Risc Microcomputer Superhtm Risc Engine Family Sh-4a Series
• Manufacturer: Renesas Electronics Corporation.

Section 31 Multimedia Card Interface (MMCIF) ........................................... 1285
31.1 Features............................................................................................................................ 1285
31.2 Input/Output Pins............................................................................................................. 1287
31.3 Register Descriptions....................................................................................................... 1288
31.4 Operation ......................................................................................................................... 1326
31.5 Operations when Using DMAC....................................................................................... 1351
31.6 MMCIF Interrupt Sources................................................................................................ 1357
31.7 Procedure to Apply the Card Detection Function ............................................................ 1358
Section 32 PC Card Controller (PCC)............................................................. 1359
32.1 Features............................................................................................................................ 1359
32.2 Input/Output Pins............................................................................................................. 1364
Rev. 1.00 Oct. 01, 2007 Page xxviii of lxvi
31.3.1 Command Type Register (CMDTYR)................................................................ 1292
31.3.2 Response Type Register (RSPTYR)................................................................... 1293
31.3.3 Transfer Byte Number Count Register (TBCR) ................................................. 1297
31.3.4 Transfer Block Number Counter (TBNCR)........................................................ 1298
31.3.5 Command Registers 0 to 5 (CMDR0 to CMDR5).............................................. 1298
31.3.6 Response Registers 0 to 16, D (RSPR0 to RSPR16, RSPRD)............................ 1300
31.3.7 Command Start Register (CMDSTRT) .............................................................. 1302
31.3.8 Operation Control Register (OPCR)................................................................... 1304
31.3.9 Command Timeout Control Register (CTOCR) ................................................. 1306
31.3.10 Data Timeout Register (DTOUTR) .................................................................... 1307
31.3.11 Card Status Register (CSTR).............................................................................. 1308
31.3.12 Interrupt Control Registers 0 and 1 (INTCR0, INTCR1) ................................... 1310
31.3.13 Interrupt Status Registers 0 and 1 (INTSTR0, INTSTR1).................................. 1312
31.3.14 Transfer Clock Control Register (CLKON)........................................................ 1316
31.3.15 VDD/Open-Drain Control Register (VDCNT)................................................... 1317
31.3.16 Data Register (DR) ............................................................................................. 1318
31.3.17 FIFO Pointer Clear Register (FIFOCLR) ........................................................... 1318
31.3.18 DMA Control Register (DMACR) ..................................................................... 1319
31.3.19 Interrupt Control Register 2 (INTCR2) .............................................................. 1320
31.3.20 Interrupt Status Register 2 (INTSTR2)............................................................... 1321
31.3.21 Card Switch Register (CSWR) ........................................................................... 1322
31.3.22 Switch Status Register (SWSR).......................................................................... 1323
31.3.23 Chattering Elimination Pulse Setting Register (CHATR) .................................. 1324
31.4.1 Operations in MMC Mode.................................................................................. 1326
31.5.1 Operation in Read Sequence............................................................................... 1351
31.5.2 Operation in Write Sequence .............................................................................. 1354
32.1.1 PCMCIA Support ............................................................................................... 1360