D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 178

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

6.2.7
DRAMCR is an 8-bit readable/writable register that selects the DRAM refresh mode and refresh
counter clock and controls the refresh timer.
DRAMCR is initialized to H'00 by a reset, and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—Refresh Control (RFSHE): Selects whether or not refresh control is performed. When
refresh control is not performed, the refresh timer can be used as an interval timer.
Bit 7
RFSHE
0
1
Bit 6—RAS-CAS Wait (RCW): Controls wait state insertion in DRAM interface CAS-before-
RAS refreshing.
Bit 6
RCW
0
1
Bit 5—Refresh Mode (RMODE): Selects whether self-refreshing is performed in software
standby mode.
Bit 5
RMODE
0
1
Rev.4.00 Sep. 07, 2007 Page 146 of 1210
REJ09B0245-0400
Bit
Initial value :
R/W
DRAM Control Register (DRAMCR)
:
:
Description
Refresh control is not performed
Refresh control is performed
Description
Wait state insertion in CAS-before-RAS refreshing disabled
RAS falls in Tr cycle
One wait state inserted in CAS-before-RAS refreshing
RAS falls in Tc1 cycle
Description
Self-refreshing is not performed in software standby mode
Self-refreshing is performed in software standby mode
RFSHE
R/W
7
0
RCW
R/W
6
0
RMODE
R/W
5
0
CMF
R/W
4
0
CMIE
R/W
0
3
CKS2
R/W
2
0
CKS1
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
CKS0
R/W
0
0