D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 856

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

19.18.2 RAM Overlap
An example in which flash memory block area EB1 is overlapped is shown below.
Example in which Flash Memory Block Area EB1 is Overlapped
1. Set bits RAMS, RAM2, RAM1, and RAM0 in RAMER to 1, 0, 0, 1, to overlap part of RAM
2. Real-time programming is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, releasing RAM overlap.
4. The data written in the overlapping RAM is written into the flash memory space (EB1).
Notes: 1. When the RAMS bit is set to 1, program/erase protection is enabled for all blocks
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onto the area (EB1) for which real-time programming is required.
regardless of the value of RAM2, RAM1, and RAM0 (emulation protection). In this
state, setting the P or E bit in flash memory control register 1 (FLMCR1) will not cause
a transition to program mode or erase mode. When actually programming a flash
memory area, the RAMS bit should be cleared to 0.
H'00000
H'01000
H'02000
H'03000
H'04000
H'05000
H'06000
H'07000
H'08000
H'3FFFF
Figure 19.45 Example of RAM Overlap Operation
Flash memory
EB8 to EB11
EB0
EB1
EB2
EB3
EB4
EB5
EB6
EB7
This area can be accessed
from both the RAM area
and flash memory area
On-chip RAM
H'FFDC00
H'FFEBFF
H'FFFBFF