D12332VFC25 Renesas Electronics America, D12332VFC25 Datasheet - Page 665

• Manufacturer Part Number: D12332VFC25
• Description: MCU 3V 0K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12332VFC25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412332VFC25; HD6412332VFC25

Serial data reception (asynchronous mode): Figure 14.7 shows a sample flowchart for serial
reception.
The following procedure should be used for serial data reception.
No
No
Read receive data in RDR, and
clear RDRF flag in SSR to 0
PER ∨ FER ∨ ORER = 1?
Read RDRF flag in SSR
Clear RE bit in SCR to 0
Read ORER, PER, and
All data received?
FER flags in SSR
Start of reception
Figure 14.7 Sample Serial Reception Flowchart
Initialization
RDRF = 1?
<End>
Yes
Yes
No
(Continued on next page)
Error handling
Yes
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Rev.4.00 Sep. 07, 2007 Page 633 of 1210
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SCI initialization:
The RxD pin is automatically
designated as the receive data
input pin.
break detection:
If a receive error occurs, read the
ORER, PER, and FER flags in
SSR to identify the error. After
performing the appropriate error
processing, ensure that the
ORER, PER, and FER flags are
all cleared to 0. Reception cannot
be resumed if any of these flags
are set to 1. In the case of a
framing error, a break can be
detected by reading the value of
the input port corresponding to
the RxD pin.
SCI status check and receive
data read :
Read SSR and check that RDRF
= 1, then read the receive data in
RDR and clear the RDRF flag to
0. Transition of the RDRF flag
from 0 to 1 can also be identified
by an RXI interrupt.
Serial reception continuation
procedure:
To continue serial reception,
before the stop bit for the current
frame is received, read the
RDRF flag, read RDR, and clear
the RDRF flag to 0. The RDRF
flag is cleared automatically
when the DMAC or DTC is
activated by an RXI interrupt and
the RDR value is read.
Receive error handling and
REJ09B0245-0400